This is a list of Alpha EV4 CPU's performance counter event types. Please see alpha architecture reference
| Name | Description | Counters usable | Unit mask options |
| ISSUES | Total issues divided by 2 | 0 | |
| PIPELINE_DRY | Nothing issued, no valid I-stream data | 0 | |
| LOAD_INSNS | All load instructions | 0 | |
| PIPELINE_FROZEN | Nothing issued, resource conflict | 0 | |
| BRANCH_INSNS | All branches (conditional, unconditional, jsr, hw_rei) | 0 | |
| CYCLES | Total cycles | 0 | |
| PAL_MODE | Cycles while in PALcode environment | 0 | |
| NON_ISSUES | Total nonissues divided by 2 | 0 | |
| DCACHE_MISSES | Total D-cache misses | 0 | |
| ICACHE_MISSES | Total I-cache misses | 0 | |
| DUAL_ISSUE_CYCLES | Cycles of dual issue | 0 | |
| BRANCH_MISPREDICTS | Branch mispredicts (conditional, jsr, hw_rei) | 0 | |
| FP_INSNS | FP operate instructions (not br, load, store) | 0 | |
| INTEGER_OPERATE | Integer operate instructions | 0 | |
| STORE_INSNS | Store instructions | 0 |
Rules of Optimization: Rule 1: Don't do it. Rule 2 (for experts only): Don't do it yet.- M.A. Jackson