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Intel architectural perfmon

This is a list of architected performance counter events for newer Intel family processors (Core1+). See Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3B (Document 253669) Chapter 18 for architectural perfmon events.

NameDescriptionCounters usableUnit mask options
CPU_CLK_UNHALTED Clock cycles when not halted all
UNHALTED_REFERENCE_CYCLES Unhalted reference cycles all 0x01: No unit mask
INST_RETIRED number of instructions retired all
LLC_MISSES Last level cache demand requests from this core that missed the LLC all 0x41: No unit mask
LLC_REFS Last level cache demand requests from this core all 0x4f: No unit mask
BR_INST_RETIRED number of branch instructions retired all
BR_MISS_PRED_RETIRED number of mispredicted branches retired (precise) all
Optimizations always bust things, because all optimizations are, in the long haul, a form of cheating, and cheaters eventually get caught. - Larry Wall