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PPC E300 events

This is a list of PPC E300's performance counter event types. Please see PowerPC e300 Core Reference Manual. Downloadable from freescale.com

NameDescriptionCounters usableUnit mask options
CPU_CLK Cycles all
COMPLETED_INSNS Completed Instructions (0, 1, or 2 per cycle) all
INSTRUCTION_FETCHES Instruction fetches all
PM_EVENT_TRANS 0 to 1 translations on the pm_event input all
PM_EVENT_CYCLES processor bus cycle all
COMPLETED_BRANCHES Branch Instructions completed all
COMPLETED_LOAD_OPS Load micro-ops completed all
COMPLETED_STORE_OPS Store micro-ops completed all
BRANCHES_FINISHED Branches finished all
TAKEN_BRANCHES_FINISHED Taken branches finished all
BRANCHES_MISPREDICTED Branch instructions mispredicted due to direction, target, or IAB prediction all
DECODE_STALLED Cycles the instruction buffer was not empty, but 0 instructions decoded all
ISSUE_STALLED Cycles the issue buffer is not empty but 0 instructions issued all
CACHEINHIBITED_ACCESSES_TRANSLATED Number of cache inhibited accesses translated all
FETCHES Counts the number of fetches that write at least one instruction to the instruction buffer. (With instruction fetched, can used to compute instructions-per-fetch) all
MMU_MISSES Counts instruction TLB miss exceptions all
BIU_MASTER_REQUESTS Number of master transactions. (Number of master TSs.) all
BIU_MASTER_I_REQUESTS Number of master I-Side transactions. (Number of master I-Side TSs.) all
BIU_MASTER_D_REQUESTS Number of master D-Side transactions. (Number of master D-Side TSs.) all
BIU_MASTER_RETRIES Number of transactions which were initiated by this processor which were retried on the BIU interface. (Number of master ARTRYs.) all
SNOOP_PUSHES Number of snoop pushes from all D-side resources. (Counts snoop ARTRY/WOPs.) all
PMC0_OVERFLOW Counts the number of times PMC0[32] transitioned from 1 to 0. all
PMC1_OVERFLOW Counts the number of times PMC1[32] transitioned from 1 to 0. all
PMC2_OVERFLOW Counts the number of times PMC2[32] transitioned from 1 to 0. all
PMC3_OVERFLOW Counts the number of times PMC3[32] transitioned from 1 to 0. all
INTERRUPTS Number of interrupts taken all
EXTERNAL_INTERRUPTS Number of external input interrupts taken all
CRITICAL_INTERRUPTS Number of critical input interrupts taken all
SC_TRAP_INTERRUPTS Number of system call and trap interrupts all
TRANS_TBL Counts transitions of the TBL bit selected by PMGC0[TBSEL] all
I_CACHE_HIT Number if fetches that hit in i-cache all
INSTRUCTIONS_FOLDED Number of instructions folded all
STALLS_COM_BUFFER Cycles issue stalled due to full completion buffer all
STALLED_COMPLETION Cycles that completion is stalled all
STALLED_LOAD Cycles that completion is stalled due to load all
STALLED_FLOAT Cycles that completion is stalled due to fp instruction all
L_S_SPACE Number of loads and stores to cacheable space in D cache all
L_S_HIT Number of loads and stores that hit in the D cache all
Premature optimization is the root of all evil. - Tony Hoare
2013/07/29